The two topics ‘Designing IP AES-128 core on ASICs using 45nm technology’ and ‘Designing Analog Front-End for ECG signal monitoring based on 90nm CMOS technology’ by two student teams from the University of Science and Technology under the University of Da Nang have just won the First and Second prizes in the ‘Microchip design for smart cities 2024 in the central region’ competition. The competition was organized by the Authority of the Ho Chi Minh City High-Tech Park, in coordination with other units under the theme ‘Dual conversion for sustainable green city development’.

Cyber Security Semiconductor team members hope that the topic ‘Designing AES-128 IP core on ASICs using 45nm technology’ will contribute to the development of a green, sustainable and information-secure city. Photo: T.V

Enhanced security

Sharing on the topic ‘Designing an AES-128 IP core on ASICs using 45nm technology’, student Nguyen Vu Thinh Anh, Team Leader of Cyber Security Semiconductor, said that in the context of information security being the top concern to protect data, the team designed an AES IP core to optimize encryption processing performance on FPGA or ASICs hardware. This brings many benefits compared to software solutions running on traditional microprocessors.

The topic aims to research and develop an efficient hardware core for the AES algorithm, meeting the requirements of performance, resources and flexibility when integrating into real systems.

The AES IP core will be integrated into data transmission application chips, communication chips to secure data transmitting data packets. In addition, AES IP has the ability to be integrated into IoT devices that sense the environment, smart electricity meters, energy and traffic monitoring systems.

These devices play an important role in data collection, transmission, processing, security and energy saving. In parallel, the AES IP core can be integrated into hardware systems at a reasonable cost and is more efficient when mass-produced thanks to its high reusability.

According to student Hoang Bao Long, a member of the Cyber Security Semiconductor team, the disadvantage of the project is that the initial development cost is quite high. However, mastering and optimizing the AES IP core brings long-term benefits to protect data and build energy-saving electronic systems, contributing to the development of green, sustainable and information-secure cities.

Building smart medical solutions

With the topic ‘Designing an ADC to convert analog signals to digital signals used in ECG electrocardiogram signals, using 90nm CMOS technology’, student Ho Nguyen Tam, the Team Leader of BKDN.Pioneers, said that among many topics on smart urban development, the team is particularly interested in the medical field.

The team was suggested and guided by Assoc. Prof., Dr. Vo Tuan Minh, the Deputy Dean of the Department of Science, Technology and International Cooperation, the University of Science and Technology, on the topic of electrocardiogram signals (ECG), a medical application with great potential to optimize the performance of mobile medical devices or remote health monitoring systems.

According to Tam, designing an ADC converter integrated in the ECG electrocardiogram system helps reduce size, consume low power, and is suitable for mobile devices, medical IoT devices, thereby realizing a continuous and accurate health monitoring model.

For this purpose, the team chose to design an Analog Front-End block for the ECG system including an amplifier and a signal-to-analog converter (SAR ADC), using 90nm CMOS technology, which helps to access and use the Cadence Virtuoso tool to simulate the circuit.

This is a modern technology that ensures performance and low energy consumption for deployment in an academic environment. The team hopes that the topic will contribute to building a smart, sustainable medical solution that is closely linked to practical needs.

According to the student group, using 90nm CMOS technology is a feasible option thanks to its low manufacturing cost but still meets the requirements for performance, resolution and energy consumption. However, competition is still a big challenge due to limitations in integration density, performance and energy consumption.

In the coming time, the team will continue to perfect the Analog Front-End system for the ECG device and improve the noise filtering, amplification and signal conversion blocks with higher accuracy.

Currently, both teams are focusing on completing their produtcs, as well as researching how to connect the blocks into a complete system, aiming to complete the simulation and evaluate the actual performance before the upcoming national final round in southern metropolis of Ho Chi Minh City.

Reporting by TUONG VY - Translating by ANH THU